(1) Field of the Invention
The invention relates to transistors, and more particularly, to a structure suitable for high current transistor devices including an array of output transistors in which the source, drain, gate, and bulk of each of the output transistors in the array is accessible from all four edges of the transistor and in which good current distribution is achieved.
(2) Description of the Related Art
Related U.S. Pat. No. 7,355,217, invented by the same inventor as the current invention and assigned to the same assignee, is hereby incorporated by reference in its entirety. The transistor structure of the referenced patent may be used to create large arrays of high current transistor devices very quickly in terms of the connections between the nodes of a big transistor device because all the connections between bulk, gate, drain and source are done automatically by only abutting the transistor cells. Unfortunately the current distribution inside the single pieces of the array is not even. It is desired to improve the transistor structure in order to get a better current distribution.
A search of the patent literature revealed U.S. Pat. Nos. 7,414,275 to Greenburg et al and 5,355,008 to Moyer et al and US Patent Application 2009/0315080 to Stribley et al. These references show various metal connections between sources and drains, but do not show connections to all of the bulk, gate, source, and drain with even current distribution.